XC2VP20-6FF1152C Xilinx, Inc., XC2VP20-6FF1152C Datasheet - Page 42

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XC2VP20-6FF1152C

Manufacturer Part Number
XC2VP20-6FF1152C
Description
Pro Platform FPGA
Manufacturer
Xilinx, Inc.
Datasheet

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Functional Description: FPGA
Table 19: Virtex-II Pro SelectRAM Memory Available
Figure 40
XC2VP4 device.
18-Bit x 18-Bit Multipliers
Introduction
A Virtex-II Pro multiplier block is an 18-bit by 18-bit 2’s com-
plement signed multiplier. Virtex-II Pro devices incorporate
many embedded multiplier blocks. These multipliers can be
associated with an 18 Kb block SelectRAM resource or can
be used independently. They are optimized for high-speed
operations and have a lower power consumption compared
to an 18-bit x 18-bit multiplier in slices.
42
XC2VP2
XC2VP4
XC2VP7
XC2VP20
XC2VP50
Device
Figure 40: XC2VP4 Block RAM Column Layout
BRAM
Multiplier
Blocks
shows the layout of the block RAM columns in the
Columns
DCM
DCM
12
4
4
6
8
CLBs
Serial Transceivers
Serial Transceivers
Blocks
Rocket I/O
216
Rocket I/O
Total SelectRAM Memory
12
28
44
88
CLBs
TM
TM
PPC405
in Kb
1,584
3,888
CLBs
CPU
216
504
792
DS083-2_11_010802
DCM
DCM
1,622,016
3,981,312
221,184
516,096
811,008
in Bits
www.xilinx.com
1-800-255-7778
Each SelectRAM memory and multiplier block is tied to four
switch matrices, as shown in
Association With Block SelectRAM Memory
The interconnect is designed to allow SelectRAM memory
and multiplier blocks to be used at the same time, but some
interconnect is shared between the SelectRAM and the
multiplier. Thus, SelectRAM memory can be used only up to
18 bits wide when the multiplier is used, because the multi-
plier shares inputs with the upper data bits of the
SelectRAM memory.
This sharing of the interconnect is optimized for an
18-bit-wide block SelectRAM resource feeding the multi-
plier. The use of SelectRAM memory and the multiplier with
an accumulator in LUTs allows for implementation of a digi-
tal signal processor (DSP) multiplier-accumulator (MAC)
function, which is commonly used in finite and infinite
impulse response (FIR and IIR) digital filters.
Configuration
The multiplier block is an 18-bit by 18-bit signed multiplier
(2's complement). Both A and B are 18-bit-wide inputs, and
the output is 36 bits.
A[17:0]
B[17:0]
Figure 41: SelectRAM and Multiplier Blocks
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Figure 42: Multiplier Block
Figure 42
MULT 18 x 18
Multiplier Block
18-Kbit block
SelectRAM
DS083-2 (v1.0) January 31, 2002
Figure
Advance Product Specification
shows a multiplier block.
41.
DS031_40_100400
DS031_33_101000
P[35:0]
R

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