LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 64

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LM3S301

Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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System Control
a. These bits mask the Run-Mode Clock Gating Control 0 (RCGC0) register (see page 113), Sleep-Mode Clock Gating Control 0
64
(SCGC0) register (see page 113), and Deep-Sleep-Mode Clock Gating Control 0 (DCGC0) register (see page 113). Bits that are
not noted are passed as 0. ADCSP is clipped to the maximum value specified in DC1.
Bit/Field
1
0
JTAG
SWD
Name
a
a
Type
RO
RO
Reset
Preliminary
1
1
Description
A 1 in this bit indicates the presence of the ARM Serial Wire
Debug (SWD) capabilities.
A 1 in this bit indicates the presence of a JTAG port.
July 5, 2006

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