LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 322

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LM3S301

Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Pulse Width Modulator (PWM)
322
Reset
Reset
Type
Type
Bit Field
PWM Interrupt Raw Status (PWMRIS)
Offset 0x018
31:17
RO
RO
31
15
0
0
15:1
16
0
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018
This register provides the current set of interrupt sources that are asserted, regardless of whether
they cause an interrupt to be asserted to the controller. The fault interrupt is latched on detection; it
must be cleared through the PWM Interrupt Status and Clear (PWMISC) register (see
page 323). The PWM generator interrupts simply reflect the status of the PWM generator; they are
cleared via the interrupt status register in the PWM generator block. Bits set to 1 indicate the
events that are active; a zero bit indicates that the event in question is not active.
RO
RO
30
14
0
0
IntPWM0
reserved
reserved
IntFault
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
RO
RO
25
0
9
0
0
0
0
0
Preliminary
reserved
reserved
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Indicates that the fault input has been asserted.
Reserved bits return an indeterminate value, and should
never be changed.
Indicates that the PWM generator 0 block is asserting its
interrupt.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
July 5, 2006
0
1
0
IntPWM0
IntFault
RO
RO
16
0
0
0

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