LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 23

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LM3S301

Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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July 5, 2006
--GPIOs
Power
Flexible Reset Sources
Additional Features
Can initiate an ADC sample sequence
12 to 33 GPIOs, depending on configuration
Programmable interrupt generation as either edge-triggered or level-sensitive
Bit masking in both read and write operations through address lines
Can initiate an ADC sample sequence
Programmable control for GPIO pad configuration:
On-chip Linear Drop-Out (LDO) voltage regulator, with programmable output
user-adjustable from 2.25 V to 2.75 V
Low-power options on controller: Sleep and Deep-sleep modes
Low-power options for peripherals: software controls shutdown of individual peripherals
User-enabled LDO unregulated voltage detection and automatic reset
3.3-V supply brownout detection and reporting via interrupt or reset
On-chip temperature sensor
Power-on reset (POR)
Reset pin assertion
Brown-out (BOR) detector alerts to system power drops
Software reset
Watchdog timer reset
Internal linear drop-out (LDO) regulator output goes unregulated
Six reset sources
Programmable clock source control
Clock gating to individual peripherals for power savings
IEEE 1149.1-1990 compliant Test Access Port (TAP) controller
Debug access via JTAG and Serial Wire interfaces
Optional fault handling for each PWM signal
Synchronization of timers in the PWM generator blocks
Synchronization of timer/comparator updates across the PWM generator blocks
Interrupt status summary of the PWM generator blocks
Weak pull-up or pull-down resistors
2-mA, 4-mA, and 8-mA pad drive
Slew rate control for the 8-mA drive
Open drain enables
Digital input enables
Preliminary
LM3S301 Data Sheet
23

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