LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 205

• Manufacturer Part Number: LM3S301
• Description: Lm3s301 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

July 5, 2006
Reset
Reset
Type
Type
Bit/Field
ADC Raw Interrupt Status (ADCRIS)
Offset 0x004
RO
RO
31
15
0
0
31:4
3
2
1
0
Register 2: ADC Raw Interrupt Status (ADCRIS), offset 0x004
This register shows the status of the raw interrupt signal of each Sample Sequencer. These bits
may be polled by software to look for interrupt conditions without having to generate controller
interrupts.
RO
RO
30
14
0
0
reserved
Name
INR3
INR2
INR1
INR0
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
RO
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
RO
RO
24
Description
Reserved bits return an indeterminate value, and should
never be changed.
Set by hardware when a sample with its respective
ADCSSCTL3 IE bit has completed conversion. This bit is
cleared by writing a 1 to the ADCISC IN3 bit.
Set by hardware when a sample with its respective
ADCSSCTL2 IE bit has completed conversion. This bit is
cleared by writing a 1 to the ADCISC IN2 bit.
Set by hardware when a sample with its respective
ADCSSCTL1 IE bit has completed conversion. This bit is
cleared by writing a 1 to the ADCISC IN1 bit.
Set by hardware when a sample with its respective
ADCSSCTL0 IE bit has completed conversion. This bit is
cleared by writing a 1 to the ADCISC IN0 bit.
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
INR3
RO
RO
19
0
3
0
LM3S301 Data Sheet
INR2
RO
RO
18
0
2
0
INR1
RO
RO
17
0
1
0
INR0
RO
RO
16
0
0
0
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