LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 106

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LM3S301

Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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General-Purpose Input/Outputs (GPIOs)
8.1
Figure 8-1. GPIO Module Block Diagram
8.2
106
PA0
PA1
PA2
PA3
PA4
PA5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
Block Diagram
Functional Description
Important:
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure 8-2).
The LM3S301 microcontroller contains five ports and thus five of these physical GPIO blocks.
U0Rx
U0Tx
C0-
C1-
SSIClk
SSIFss
CCP0
C0+
SSIRx
SSITx
All GPIO pins are inputs by default (GPIODIR=0 and GPIOAFSEL=0), with the
exception of the five JTAG pins (PB7 and PC[3:0]. The JTAG pins default to their
JTAG functionality (GPIOAFSEL=1). Asserting a Power-On-Reset (POR) or an
external reset (RST) puts both groups of pins back to their default state.
Comparators
Timer 0
Analog
UART0
SSI
C1o/C1+
C0o
Preliminary
Fault
TRST
JTAG
Timer 1
PWM0
TCK/SWCLK
TMS/SWDIO
TDO/SWO
PWM0
PWM1
CCP2
TDI
July 5, 2006
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PE0
PE1
PE2

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