LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 279

• Manufacturer Part Number: LM3S301
• Description: Lm3s301 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

July 5, 2006
Reset
Reset
Type
Type
SSI Status (SSISR)
Offset 0x00C
Bit/Field
RO
RO
31
15
0
0
31:5
4
3
2
1
0
Register 4: SSI Status (SSISR), offset 0x00C
SSISR is a status register that contains bits that indicate the FIFO fill status and the SSI busy
status.
RO
RO
30
14
0
0
reserved
Name
RNE
BSY
RFF
TNF
TFE
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
27
11
0
0
RO
RO
RO
RO
RO
R0
reserved
RO
RO
26
10
0
0
Reset
RO
RO
25
0
0
0
0
1
1
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
SSI Busy Bit
0: SSI is idle.
1: SSI is currently transmitting and/or receiving a frame, or the
transmit FIFO is not empty.
SSI Receive FIFO Full
0: Receive FIFO is not full.
1: Receive FIFO is full.
SSI Receive FIFO Not Empty
0: Receive FIFO is empty.
1: Receive FIFO is not empty.
SSI Transmit FIFO Not Full
0: Transmit FIFO is full.
1: Transmit FIFO is not full.
SSI Transmit FIFO Empty
0: Transmit FIFO is not empty.
1: Transmit FIFO is empty.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
BSY
RO
RO
20
0
4
0
RFF
RO
RO
19
0
3
0
LM3S301 Data Sheet
RNE
RO
RO
18
0
2
0
TNF
RO
RO
17
0
1
1
TFE
RO
RO
16
0
0
1
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