SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 81

• Manufacturer Part Number: SPC8104
• Description: VGA LCD CONTROLLER
• Manufacturer: S-MOS Systems

Background
There are two ways in which the SPC8104 differs from the VGA standard.
Firstly, the CRTC timing registers differ since the SPC8104 is optimized to support single/dual
LCD panels of various sizes. The panel size and timings are determined by four special registers
(horizontal display size, vertical display size, horizontal non-display period, and vertical non-dis-
play period registers). The CRTC registers of the VGA standard which would normally be used to
vary the display monitor timings to other display sizes have been removed and replaced by
dummy registers that are read/writable but which have no other effect.
Secondly, there are some functions provided in the VGA register set that are never used in com-
mon VGA applications - the register bits for these functions have been removed from the register
set supported in SPC8104 in order to optimize the design for VGA operation on a 16 gray-scale
640x480 dot LCD panel. In their place have are read/writable registers bits that have no effect.
General Discussion
In the SPC8104, the non-timing related CRTC registers are the same as in the VGA standard.
However, to reduce the size (and therefore, cost) of the device, the SPC8104 does not include
any of the VGA timing registers that provide full monitor timing programmability since much of the
timing circuitry has been fixed in hardware to support LCD panels of various sizes.
The SPC8104 horizontal timing circuitry is programmed by a Horizontal Display Size register and
a Horizontal Non-Display Period register to provide flexible horizontal timing. The vertical timing
circuitry is programmed by a Vertical Display Size register and a Vertical Non-Display Period reg-
ister to provide flexible vertical timing. The functions of all timing registers have been omitted; only
the VDE End register (index 12h) remains and acts as per the VGA specification. The functions of
registers 00h to 06h, 10h, 15h, 16h and certain bits in registers 07h, 09h, 0Bh, and 11h have all
been omitted - dummy read/write registers are provided.
Shift-Load and Count-by-2 are normally used only in modes 0Fh and 10h when run on 64kbyte
VGA cards. Since the SPC8104 is exclusively a 512kbyte device, this option is not useful. The
Shift-4 and Count-by-4 functions are never used in any standard VGA mode or by standard soft-
ware. No problems are expected arising from the deletion of these unused features. These bits
will be removed from the register set.
The 720 dot text modes (0+,1+,2+,3+) must be reduced to 640 dot modes due to the fixed panel
horizontal size. To simplify the design, the logic to select a 9-dot character clock has been
removed.The associated register bit in the Sequencer still exists as a read/write bit with no other
effect in hardware, since some software expects to use the value set in this bit to calculate screen
size.
HRTC/2 mode has been omitted. In standard VGA, this mode was provided to support vertical
resolutions greater than 1024.
SPC8104
CRTC Timing Registers
Shift-Load, Shift-4, Count-by-2, Count-by-4 modes not supported
Support for Maximum 640 Dot LCD Panel Only
412-1.0
S-MOS Systems, Inc. • Tel: [phone] • Fax: [phone] • http://www.smos.com
X15-SP-001-08.1
Hardware Functional Specification
SP1-55