SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 101

• Manufacturer Part Number: SPC8104
• Description: VGA LCD CONTROLLER
• Manufacturer: S-MOS Systems

LCD Gray Scale Lookup Table Registers
bits 7-0
bits 1-0
bits 7-0
bits 7-0
SPC8104
Dummy LCD Lookup Table Pixel Mask Register
3C6h RW
bit 7
Lookup Table Status Register
3C7h RO
n/a
LCD Lookup Table Read Address Register
3C7h WO
bit 7
LCD Lookup Table Write Address Register
3C8h RW
bit 7
412-1.0
bit 6
n/a
bit 6
bit 6
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Dummy Lookup Table Pixel Mask Register Bits [7:0]
This register contains 8 read/write bits that have no effect in hardware. These bits are provided for
compatibility with some software that expects to use the value stored in this register.
Lookup Table Status Register Bits [1:0]
Directly after a write to the Lookup Table Read Address Register, the Read/Write Mode Status bits
1-0 are both set to 1. Directly after a write to the Lookup Table Write Address Register, both these
bits are set to 0. Note that if the 3c9h Write Disable bit (bit 4 in Auxiliary Register 00) is set to 1,
writes to the Lookup Table Data registers (3C9h) are ignored, but in this case the Read/Write Mode
Status bits are still set to 0 as if the write did occur.
Lookup Table Read Addr Bits [7:0]
These 8 bits are used to select 1 of 64 gray scale lookup table registers to be read. Note that only
the lower 6 bits of this register are used to address reads into the Lookup Table - in other words,
reads will wrap every 64 addresses to the physical 64 Lookup Table locations at addresses 00-3Fh.
Once a valid read address is set in this register, the lookup table entry can be read by three suc-
cessive reads (red, green, blue) of the Lookup Table Data Register 3C9h. After a successful read
operation (i.e. three successive reads), the read address is automatically incremented.
Directly after writing an index value to this register, the Lookup Table Status Register Read/Write
Mode Status bits 1-0 are both set to 1.
Lookup Table Write Addr Bits [7:0]
These 8 bits are used to select 1 of 64 gray scale lookup table registers to be written. Note that all
8 write address bits are normally decoded so that the 64 lookup table registers reside at the unique
addresses 00 - 3Fh. Any attempted write to lookup table addresses 40h - FFh will be ignored.
Once a valid write address is set in this register, the lookup table entry can be written by three suc-
cessive writes (red, green, blue) to the Lookup Table Data Register 3C9h. After a successful write
operation (i.e. three successive write), the write address is automatically incremented.
Directly after a writing an index value to this register, the Lookup Table Status Register Read/Write
Mode Status bits 1-0 are both set to 0.
bit 5
n/a
bit 5
bit 5
bit 4
n/a
bit 4
bit 4
Lookup Table Read Address
Lookup Table Write Address
Dummy LUT Pixel Mask
X15-SP-001-08.1
bit 3
n/a
bit 3
bit 3
n/a
bit 2
bit 2
bit 2
Hardware Functional Specification
bit 1
bit 1
bit 1
bit 1
Read Write Mode Status
bit 0
bit 0
bit 0
bit 0
SP1-75