SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 263
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SPC8104
Manufacturer Part Number
SPC8104
Description
VGA LCD CONTROLLER
Manufacturer
S-MOS Systems
Datasheet
1.SPC8104.pdf
(306 pages)
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Negative Power Supply
The majority of Dual Panel Dual Drive Monochrome STN LCD panels require a negative power
supply to provide between -18 V and -23 V (I
such a power supply has been provided as an integral part of this design. The signal VLCD can
be found on J3 (pin 32) and its output voltage can be controlled by R10 and control signal LCD-
PWR#.
R10 (100K potentiometer) can be adjusted to provide an output voltage from -18 V to -23 V.
LCDPWR# is a control signal provided by the SPC8104F0A which is used to enable/disable the
VLCD power supply. This signal guarantees correct power sequencing and prohibits subsequent
panel damage.
Determine the panel’s specific power requirements and set R10 accordingly before connecting
the panel.
External Oscillator Support
The SPC8104F0A requires an external clock for the CLKI input (pin 77). The clock source for
MIM panels should be 24 MHz while the clock input for passive panels should be 28 MHz (in
order to provide a reasonable frame rate). The 5.0v oscillator outputs pass through voltage trans-
lators for interface into the 8104 3.3v inputs.
Power Down Clock Support
A 32 KHz oscillator is provided for connection to the PDCLK input (pin 79). This clock source is
required to provide the DRAM refresh cycles in some power down modes. The 5.0v oscillator out-
puts pass through voltage translators for interface into the 8104 3.3v inputs.
SPC8104
If a positive bias voltage is required, an external source must be used. Ensure that the proper
power sequencing can be observed or panel damage may occur.
412-1.0
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
out
=45mA) (VLCD). For ease of implementation,
SDU8104B
0B
Rev 1.0 ISA Bus Evaluation Board
EV1-11
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