SPC8104 S-MOS Systems, SPC8104 Datasheet - Page 44

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SPC8104

Manufacturer Part Number
SPC8104
Description
VGA LCD CONTROLLER
Manufacturer
S-MOS Systems
Datasheet

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The following tables summarize the mapping of the SPC8104’s internal memory address bits
a[17:0] to the multiplexed row/column address outputs MA[9:0] for the two types of DRAM.
Hardware Functional Specification
Pin Name
CLKI
SP1-18
1. For the 10x8 type DRAMs:
2. For the 9x9 type DRAMs:
1. The address pin mapping for both types of DRAM are actually the same.
2. For the standard 256K byte VGA address space, a[17] is normally = 0, and for the upper 256K
bytes, a[17] = 1.
3. The 10x8 type DRAM does not use the 9th column bit MA[8] - it is ignored.
4. a[17] is output on the 9th column bit MA[8], so the same physical addressing scheme works
for both 10x8 and 9x9 type DRAMs. In the case of the 10x8 type DRAM, this 9th column address
bit is not used by the DRAM ( bold-italicized in the above table).
5. The 9x9 configuration does not have a 10th row/column address bit.
S-MOS Systems, Inc. • Tel: (408) 922-0200 • Fax: (408) 922-0238 • http://www.smos.com
column addr
column addr
row addr
row addr
Type
I
Table 0-5 10x8 DRAM Address Mapping
Table 0-6 9x9 DRAM Address Mapping
Pin #
77
MA[9]
MA[9]
Drive
C
a[17]
n/c
n/c
-
Table 0-7 Clock Inputs
Description
This is the clock source input and should be connected to an external
oscillator.
MA[8]
MA[8]
a[16]
a[17]
a[16]
a[17]
X15-SP-001-08.1
MA[7:0]
MA[7:0]
a[15:8]
a[15:8]
a[7:0]
a[7:0]
412-1.0
SPC8104

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