AN2692 Freescale Semiconductor / Motorola, AN2692 Datasheet - Page 9

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AN2692

Manufacturer Part Number
AN2692
Description
MC9S12NE64 Integrated Ethernet Controller
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Figure 7
including the core, bus (IP
The modules shown in
clock signals from the CRG is provided.
Configuring the CRG
The source code for configuring the CRG and other peripherals can be created automatically with
Processor Expert , which is a stand-alone utility of Unis that is available as a plug-in for CodeWarrior
software. The developer can also manually write code and determine the register settings for a specific
configuration. The equations used to determine peripheral settings are provided in this section.
The CRG module provides a set of registers that allows the user to control the operation and behavior of
the MCU in its various configurations and modes. The CRG registers that affect clocking include:
Freescale Semiconductor
SYNR register — Controls the multiplication factor of the PLL.
REFDV register — Provides a finer granularity for the PLL multiplier steps.
CLKSEL register — Configures and controls the clock behavior of the stop and wait modes of the
MCU. The PLLSEL bit in this register controls whether the system clocks are derived from the
PLLCLK or OSCCLK signal.
PLLCTL register — Controls PLL functionality and other CRG functions. The PLLON bit in this
register turns on the PLL circuitry.
illustrates the dependence of the peripherals, core, and memory on the CRG clock outputs,
EXTAL
Figure 7
Bus
MC9S12NE64 Integrated Ethernet Controller, Rev. 0.2
), and oscillator clocks.
CRG
are discussed in this section. A discussion of how each module uses the
Figure 7. MC9S12NE64 Clock Tree
IPBUS CLOCK
OSCILLATOR CLOCK
CORE CLOCK
MC9S12NE64 Integrated Ethernet Controller
S12_CORE
FLASH
VREG
RAM
ATD
PMF
DAC
PIM
TIM
SCI
SPI
IIC
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