LM3S101-CRN20-XNPT Luminary Micro, Inc., LM3S101-CRN20-XNPT Datasheet - Page 83

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LM3S101-CRN20-XNPT

Manufacturer Part Number
LM3S101-CRN20-XNPT
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
Internal Memory
7.4
Table 7-2.
a. Relative to System Control base address of 0x400FE000.
7.5
83
Offset
0X140
0x130
0x134
0x00C
0x000
0x004
0x008
0x010
0x014
a
a
a
Name
FMPRE
FMPPE
USECRL
FMA
FMD
FMC
FCRIS
FCIM
FCMISC
The flash is programmed using the following sequence:
1.
2.
3.
4.
To perform an erase of a 1-KB page:
1.
2.
3.
To perform a mass erase of the flash:
1.
2.
Register Map
Table 7-2 lists the Flash memory and control registers. All addresses given are relative to the
Flash control base address of 0x400FD000, except for FMPRE and FMPPE, which are relative to
the System Control base address of 0x400FE000.
Register Descriptions
The remainder of this section lists and describes the Flash Memory registers, in numerical order
by address offset.
Write source data to the FMD register.
Write the target address to the FMA register.
Write the flash write key and the WRITE bit (a value of 0xA4420001) to the FMC register.
Poll the FMC register until the WRITE bit is cleared.
Write the page address to the FMA register.
Write the flash write key and the ERASE bit (a value of 0xA4420002) to the FMC register.
Poll the FMC register until the ERASE bit is cleared.
Write the flash write key and the MERASE bit (a value of 0xA4420004) to the FMC register.
Poll the FMC register until the MERASE bit is cleared.
Flash Register Map
Reset
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x0F
0x0F
0x13
Type
R/W1C
R/W0
R/W0
R/W
R/W
R/W
R/W
R/W
RO
Preliminary
Description
Flash memory read protect
Flash memory program protect
U second reload
Flash memory address
Flash memory data
Flash memory control
Flash controller raw interrupt status
Flash controller interrupt mask
Flash controller masked interrupt status and clear
March 22, 2006
See
page
84
84
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86
87
88
90
91
92

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