LM3S101-CRN20-XNPT Luminary Micro, Inc., LM3S101-CRN20-XNPT Datasheet - Page 103

• Manufacturer Part Number: LM3S101-CRN20-XNPT
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

General-Purpose Input/Outputs (GPIOs)
103
Reset
Reset
Type
Type
GPIO Interrupt Both Edges (GPIOIBE)
Offset 0x408
RO
RO
31
15
0
0
31:8
7:0
Bit
Register 4: GPIO Interrupt Both Edges (GPIOIBE), offset 0x408
The GPIOIBE register is the interrupt both-edges register. When the corresponding bit in the GPIO
Interrupt Sense (GPIOIS) register (see page 102) is set to detect edges, bits set to High in
GPIOIBE configure the corresponding pin to detect both rising and falling edges, regardless of the
corresponding bit in the GPIO Interrupt Event (GPIOIEV) register (see page 104). Clearing a bit
configures the pin to be controlled by GPIOIEV. All bits are cleared by a reset.
RO
RO
30
14
0
0
reserved
Name
IBE
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x00
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPIO Interrupt Both Edges
0: Interrupt generation is controlled by the GPIO Interrupt Event
(GPIOIEV) register (see page 142).
1: Both edges on the corresponding pin trigger an interrupt.
Note:
RO
RO
24
0
8
0
reserved
R/W
Single edge is determined by the corresponding bit in
GPIOIEV.
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
IBE
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
March 22, 2006
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0