LM3S101-CRN20-XNPT Luminary Micro, Inc., LM3S101-CRN20-XNPT Datasheet - Page 146

• Manufacturer Part Number: LM3S101-CRN20-XNPT
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

March 22, 2006
Reset
Reset
Type
Type
GPTM Interrupt Mask (GPTMIMR)
Offset 0x018
31:11
RO
RO
31
15
0
0
7:4
Bit
10
9
8
3
2
1
0
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018
This register allows software to enable/disable GPTM controller-level interrupts. Writing a 1
enables the interrupt, while writing a 0 disables it.
RO
RO
30
14
0
0
reserved
reserved
TBTOIM
TATOIM
C2MIM
RTCIM
C1MIM
C2EIM
C1EIM
Name
reserved
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
27
11
0
0
C2EIM
R/W
RO
26
10
0
0
Reset
0
0
0
0
0
0
0
0
0
C2MIM TBTOIM
R/W
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM Capture2 Event Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM Capture2 Match Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM TimerB Time-Out Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
Read as 0.
GPTM RTC Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM Capture1 Event Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM Capture1 Match Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM TimerA Time-Out Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
R/W
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RTCIM
R/W
RO
19
0
3
0
LM3S101 Data Sheet
C1EIM C1MIM TATOIM
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
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