FLLXT971A Intel, FLLXT971A Datasheet - Page 41

• Manufacturer Part Number: FLLXT971A
• Description: 3.3V Dual Speed Fast Ethernet PHY Transceicer
• Manufacturer: Intel

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3.7.3.2
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Table 11. 4B/5B Coding (Continued)
PMA Sublayer
3.7.3.2.1 Link
In 100 Mbps mode, the LXT971A establishes a link whenever the scrambler becomes locked and
remains locked for approximately 50 ms. Whenever the scrambler loses lock (receiving less than
12 consecutive idle symbols during a 2 ms window), the link is taken down. This provides a very
robust link, essentially filtering out any small noise hits that may otherwise disrupt the link.
Furthermore, 100 Mbps idle patterns will not bring up a 10 Mbps link.
The LXT971A reports link failure via the MII status bits (Register bits 1.2 and 17.10) and interrupt
functions. Link failure causes the LXT971A to re-negotiate if auto-negotiation is enabled.
3.7.3.2.2 Link Failure Override
The LXT971A normally transmits data packets only if it detects the link is up. Setting Register bit
16.14 = 1 overrides this function, allowing the LXT971A to transmit data packets even when the
link is down. This feature is provided as a diagnostic tool. Note that auto-negotiation must be
disabled to transmit data packets in the absence of link. If auto-negotiation is enabled, the
LXT971A automatically transmits FLP bursts if the link is down.
3.7.3.2.3 Carrier Sense
For 100BASE-TX and 100FX links, a start-of-stream delimiter (SSD) or /J/K symbol pair causes
assertion of carrier sense (CRS). An end-of-stream delimiter (ESD) or /T/R symbol pair causes de-
assertion of CRS. The PMA layer also de-asserts CRS if IDLE symbols are received without /T/R;
however, in this case RX_ER is asserted for one clock cycle when CRS is de-asserted.
Usage of CRS for Interframe Gap (IFG) timing is not recommended for the following reasons:
1. The /I/ (Idle) code group is sent continuously between frames.
2. The /J/ and /K/ (SSD) code groups are always sent in pairs; /K/ follows /J/.
3. The /T/ and /R/ (ESD) code groups are always sent in pairs; /R/ follows /T/.
4. An /H/ (Error) code group is used to signal an error condition.
Code Type
INVALID
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
undefined
4B Code
3 2 1 0
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Name
H
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
4
5B Code
0 0 0 0 0
0 0 0 0 1
0 0 0 1 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 1 0 0
1 0 0 0 0
1 1 0 0 1
4 3 2 1 0
0 0 1 0 0
Transmit Error. Used to force signaling
errors
Interpretation
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
Invalid
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