FLLXT971A Intel, FLLXT971A Datasheet - Page 27
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FLLXT971A
Manufacturer Part Number
FLLXT971A
Description
3.3V Dual Speed Fast Ethernet PHY Transceicer
Manufacturer
Intel
Datasheet
1.FLLXT971A.pdf
(90 pages)
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4
3.4.2
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Hardware Control Mode
In the Hardware Control Mode, LXT971A disables direct write operations to the MDIO registers
via the MDIO Interface. On power-up or hardware reset the LXT971A reads the Hardware Control
Interface pins and sets the MDIO registers accordingly.
The following modes are available using either Hardware Control or MDIO Control:
When the network link is forced to a specific configuration, the LXT971A immediately begins
operating the network interface as commanded. When auto-negotiation is enabled, the LXT971A
begins the auto-negotiation/parallel-detection operation.
•
•
•
Force network link to 100FX (Fiber).
Force network link operation to:
Allow auto-negotiation/parallel-detection.
— 100BASE-TX, Full-Duplex.
— 100BASE-TX, Half-Duplex.
— 10BASE-T, Full-Duplex.
— 10BASE-T, Half-Duplex.
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
27