FLLXT971A Intel, FLLXT971A Datasheet - Page 21

• Manufacturer Part Number: FLLXT971A
• Description: 3.3V Dual Speed Fast Ethernet PHY Transceicer
• Manufacturer: Intel

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Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Functional Description
Introduction
The LXT971A is a single-port Fast Ethernet 10/100 transceiver that supports 10 Mbps and 100
Mbps networks and complies with all applicable requirements of IEEE 802.3. The LXT971A
directly drives either a 100BASE-TX line (up to 140 meters) or a 10BASE-T line (up to 185
meters). The device also supports 100BASE-FX operation via a Low Voltage PECL (LVPECL)
interface.
Comprehensive Functionality
The LXT971A provides a standard Media Independent Interface (MII) for 10/100 MACs. The
LXT971A performs all functions of the Physical Coding Sublayer (PCS) and Physical Media
Attachment (PMA) sublayer as defined in the IEEE 802.3 100BASE-X standard. This device also
performs all functions of the Physical Media Dependent (PMD) sublayer for 100BASE-TX
connections.
The LXT971A reads its configuration pins on power-up to check for forced operation settings. If
not configured for forced operation, the device uses auto-negotiation/parallel detection to
automatically determine line operating conditions. If the PHY device on the other side of the link
supports auto-negotiation, the LXT971A auto-negotiates with it using Fast Link Pulse (FLP)
Bursts. If the PHY partner does not support auto-negotiation, the LXT971A automatically detects
the presence of either link pulses (10 Mbps PHY) or Idle symbols (100 Mbps PHY) and sets its
operating conditions accordingly.
The LXT971A provides half-duplex and full-duplex operation at 100 Mbps and 10 Mbps.
OSP™ Architecture
The LXT971A incorporates high-efficiency Optimal Signal Processing™ design techniques,
combining the best properties of digital and analog signal processing to produce a truly optimal
device.
The receiver utilizes decision feedback equalization to increase noise and cross-talk immunity by
as much as 3 dB over an ideal all-analog equalizer. Using OSP mixed-signal processing techniques
in the receive equalizer avoids the quantization noise and calculation truncation errors found in
traditional DSP-based receivers (typically complex DSP engines with A/D converters). This results
in improved receiver noise and cross-talk performance.
The OSP signal processing scheme also requires substantially less computational logic than
traditional DSP-based designs. This lowers power consumption and also reduces the logic
switching noise generated by DSP engines. This logic switching noise can be a considerable source
of EMI generated on the device’s power supplies.
The OSP-based LXT971A provides improved data recovery, EMI performance and low power
consumption.
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
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