FLLXT971A Intel, FLLXT971A Datasheet - Page 31

• Manufacturer Part Number: FLLXT971A
• Description: 3.3V Dual Speed Fast Ethernet PHY Transceicer
• Manufacturer: Intel

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3.5
3.5.1
3.5.1.1
3.5.1.2
3.5.1.3
3.5.2
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
Establishing Link
See
Auto-Negotiation
If not configured for forced operation, the LXT971A attempts to auto-negotiate with its link
partner by sending Fast Link Pulse (FLP) bursts. Each burst consists of up to 33 link pulses spaced
62.5 µs apart. Odd link pulses (clock pulses) are always present. Even link pulses (data pulses) may
be present or absent to indicate a “1” or a “0”. Each FLP burst exchanges 16 bits of data, which are
referred to as a “link code word”. All devices that support auto-negotiation must implement the
“Base Page” defined by IEEE 802.3 (registers 4 and 5). LXT971A also supports the optional “Next
Page” function as described in
Base Page Exchange
By exchanging Base Pages, the LXT971A and its link partner communicate their capabilities to
each other. Both sides must receive at least three identical base pages for negotiation to continue.
Each side identifies the highest common capabilities that both sides support and configures itself
accordingly.
Next Page Exchange
Additional information, above that required by base page exchange is also sent via “Next Pages”.
The LXT971A fully supports the IEEE 802.3ab method of negotiation via Next Page exchange.
Controlling Auto-Negotiation
When auto-negotiation is controlled by software, the following steps are recommended:
Parallel Detection
For the parallel detection feature of auto-negotiation, the LXT971A also monitors for 10BASE-T
Normal Link Pulses (NLP) and 100BASE-TX Idle symbols. If either is detected, the device
automatically reverts to the corresponding operating mode. Parallel detection allows the LXT971A
to communicate with devices that do not support auto-negotiation.
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•
•
Figure 9
After power-up, power-down, or reset, the power-down recovery time, as specified in
on page
Set the Auto-Negotiation Advertisement Register bits.
Enable auto-negotiation (set MDIO Register bit 0.12 = 1).
70, must be exhausted before proceeding.
for an overview of link establishment.
Tables 50 and 51 on page 80
LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
(registers 7 and 8).
Table 40
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