IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 88

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IDT88P8344

Manufacturer Part Number
IDT88P8344
Description
Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
Manufacturer
Integrated Device Technology
Datasheet

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Write cycle specification Intel non-multiplexed bus (MPM=1)
NOTE
1. RDB should be tied to a logic one.
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
Symbol
T
t
t
t
t
t
t
tRecovery Recovery time from read cycle
WC
WRW
AV
AH
DV
DHW
:
Write DBUS[7:0]
Parameter
Internal main clock period (MCLK)
Write cycle time
Valid WRB width
Delay from WRB to Valid Address
Address to WRB hold time
Delay from WRB to valid write data
Write data to WRB hold time
WRB + CSB
ADD[5:0]
Figure 40. Microprocessor parallel port Intel mode write timing diagram
2.5T+19
2.5T+14
2.5T+12
2.5T+12
MIN
80
5
T/2-2
T/2-2
MAX
100
88
t
WC
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
t
AV
t
DV
t
WRW
Valid Address
INDUSTRIAL TEMPERATURE RANGE
t
DHW
t
AH
t
Recovery
APRIL 10, 2006
6370 drw10

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