IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 85

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IDT88P8344

Manufacturer Part Number
IDT88P8344
Description
Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
Manufacturer
Integrated Device Technology
Datasheet

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11.6.6.1 Microprocessor parallel port AC timing
specifications
mode.
Read cycle specification Motorola non-multiplexed (MPM=0)
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
Symbol
T
t
t
t
t
t
t
t
t
tRecovery Recovery time from read cycle
DW
RWH
AV
ADH
RC
RWV
RPD
DAZ
Be sure to connect SPI_EN to a logic low when using the parallel µP interface
Parameter
Internal main clock period (MCLK)
Read cycle time
Valid DSB width
Delay from DSB to valid read signal
R/WB to DSB hold time
Delay from DSB to Valid Address
Address to DSB hold time
DSB to valid read data propagation delay
Delay from read data active to high Z
READ DBUS[7:0]
DSB + CSB
ADD[5:0]
R/WB
Figure 37. Microprocessor parallel port Motorola read timing diagram
5.5T+25
5.5T+20
2T+10
2T+10
MIN
80
5
t
RC
5.5T+20
T/2-4
T/2-4
MAX
100
12
t
PRD
85
t
t
Unit
MHz
RWV
AV
ns
ns
ns
ns
ns
ns
ns
ns
ns
Valid Address
t
DW
Valid Data
t
RWH
t
ADH
INDUSTRIAL TEMPERATURE RANGE
t
Recovery
t
DAZ
6370 drw07
APRIL 10, 2006

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