IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 64

• Manufacturer Part Number: IDT88P8344
• Description: Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
• Manufacturer: Integrated Device Technology

9.3.7 Block base 0x1000 registers
SPI-3 ingress packet length configuration register
(Block_base 0x1000 + Register_offset 0x00-0x3F)
SPI-3 ingress interface. Each SPI-3 ingress interface has 64 registers, one for
each of the allowed LIDs supported per SPI-3 interface. Each register has read
and write access. The minimum and maximum packet lengths per LID are
provisioned using the SPI-3 ingress packet length configuration register. The
bit fields of a SPI-3 ingress packet length configuration register are described.
packet length is programmed from 0 to 255 bytes. The resolution of the minimum
packet length is one byte.
packet length is programmed from 0 to 16,383 bytes. The resolution of the
maximum packet length is one byte.
9.3.8 Block base 0x1100 registers
SPI-4 egress port descriptor table (Block_base
0x1100 + Register_offset 0x00-0x3F)
interface. The minimum and maximum SPI-4 egress burst lengths per LID are
provisioned using a SPI-4 egress port descriptor table. Each SPI-4 egress port
descriptor table has read and write access. The bit fields of a SPI-4 egress port
descriptor table are described. These fields need to be programmed only for
SPI-4 egress (DIRECTION=0 in Table 74-SPI-4 egress direction code
assignment).
device has declared hungry through the FIFO status channel. The number in
the MAX_BURST_H field is taken to mean that one more than that number
multiplied by 16 is the maximum hungry burst length. For example, programming
the number 3 into the MAX_BURST_H field results in a maximum hungry burst
size of (3 + 1) x 16 = 64 bytes.
device has declared starving through the FIFO status channel. The number in
the MAX_BURST_S field is taken to mean that one more than that number
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
There is one set of SPI-3 ingress packet length configuration registers per
MIN_LENGTH SPI-3 ingress minimum packet length. The minimum
MAX_LENGTH SPI-3 ingress maximum packet length. The maximum
There are four sets of SPI-4 egress port descriptor tables, one per SPI-3
MAX_BURST_H
MAX_BURST_S
MAX_BURST_H
MAX_BURST_S
DIRECTION
Reserved
MIN_LENGTH
Reserved
MAX_LENGTH
Reserved
Field
Field
SPI-4 egress per-LID burst length when the attached
SPI-4 egress per-LID burst length when the attached
29:16
30:31
31:10
Bits
15:8
Bits
7:0
3:0
7:4
9:8
Length
Length
14
22
8
8
2
4
4
2
Initial Value
Initial Value
0x5EE
0x40
0x00
0x000
0x0
0xF
0xF
0x3
64
multiplied by 16 is the maximum starving burst length. For example, program-
ming the number 7 into the MAX_BURST_S field results in a maximum starving
burst size of (7 + 1) x 16 = 128 bytes. The MAX_BURST_S field should not be
set to less than the MAX_BURST_H field.
cessor, directed to a SPI-3 egress port, to the SPI-4 egress port, or discarded.
The Path selection is defined for each of the 64 LIDs by the associated
DIRECTION field as shown in the following table.
9.3.9 Block base 0x1200 registers
SPI-3 ingress port descriptor tables (Block_base
0x1200 + Register_offset 0x00-0x3F)
interface. The SPI-3 ingress port descriptor tables are at Block_base 0x1200
+ Register_offset 0x00-0x3F and have read and write access. Each SPI-3
ingress interface has 64 table entries for per-LID provisioning of M and
FREE_SEGMENT fields. The SPI-3 ingress port descriptor tables are used to
control the amount of buffering and the free segment backpressure threshold
of the available buffer segment pool for a SPI-3 ingress on a per-LID basis.
of 256 bytes per segment. These 508 segments are shared among the LIDs
initially programmed into the NR_LID fields. A SPI-3 ingress LID can be allocated
the maximum number of segments out of the available buffer segments, or can
be programmed to fewer segments by decreasing the M field.
segment backpressure threshold for a LID on a SPI-3 ingress.
allocated to a LID. The range of M is 0x000 to 0x1FC (508 base 10), but can
not exceed the number set by the choice of NR_LID [Block_base 0x1300 +
Register_offset 0x00].
M
Reserved
Reserved
Reserved
FREE_SEGMENT
Reserved
DIRECTION
There is one set of 64 SPI-3 ingress port descriptor tables per SPI-3 ingress
Each SPI-3 buffer segment pool is 128 Kbytes, divided into 508 segments
The FREE_SEGMENT field is used, along with the M field, to set the free
M
DIRECTION
00
01
10
11
Field
The number of 256-byte buffer pool segments on a SPI-3 ingress port
The SPI-4 egress traffic can be captured by the micropro-
SPI-4
Associated SPI-3
Capture to microprocessor
Discard
20:16
23:21
28:24
31:29
Bits
15:9
8:0
Path
INDUSTRIAL TEMPERATURE RANGE
Length
9
7
5
3
5
3
Initial Value
APRIL 10, 2006
0x000
0x00
0x00
0x00
0x0
0x0