HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 57

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

863 C ]Y^Y
6.2.1 Master mode
To configure the HFC-S mini as PCM/GCI/IOM2 bus master bit 0 of the MST_MODE0 register must be
set. In this case C4IO and F0IO are outputs.
The PCM bit rate is configured by bits 5..4 of the MST_MODE1 register.
All specifications are for f
*)
SYMBOL
t
t
t
t
t
t
t
t
t
t
C
C4P
C4H
C4L
C2P
C2H
C2L
F0iW
SToD
F0iCYCLE
Time depends on accuracy of CLKI frequency. Because of clock adjustment in the 31st time slot
these are the worst case timings when C4IO is adjusted.
for 2Mb/s (PCM30)
for 4Mb/s (PCM64)
for 8Mb/s (PCM128)
Clock C4IO period
Clock C4IO High Width
Clock C4IO Low Width
Clock C2O Period
Clock C2O High Width
Clock C2O Low Width
F0IO Width
STIO1/2 Delay fom C4IO
F0IO Cycle Time
CLK
CHARACTERISTICS
= 24.576 MHz.
*)
*)
Short F0IO
Long F0IO
1 half clock adjust
2 half clocks adjust
3 half clocks adjust
4 half clocks adjust
*)
Level 1 Output
124.975 us 125.000 us 125.025 us
124.950 us 125.000 us 125.050 us
124.925 us 125.000 us 125.075 us
124.900 us 125.000 us 125.100 us
2 t
4 t
2 t
2 t
2 t
4 t
t
t
C
C
MIN.
C
C
C
C
- 26ns
- 26ns
C
C
- 26ns
- 52ns
- 26ns
- 26ns
- 6ns
- 6ns
122.07 ns
61.035 ns
30.518 ns
TYP.
10 ns
2 t
4 t
2 t
2 t
2 t
4 t
t
t
C
C
C
C
C
C
C
C
Cologne
Chip
2 t
4 t
2 t
2 t
2 t
4 t
t
t
C
C
MAX.
C
C
C
C
25 ns
+ 26ns
+ 26ns
C
C
+ 26ns
+ 52ns
+ 26ns
+ 26ns
+ 6ns
+ 6ns