HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 27

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HFC-Smini

Manufacturer Part Number
HFC-Smini
Description
Manufacturer
Cologne Chip AG
Datasheet
863C ]Y^Y
Number Function
[4]
[5]
[6]
Input Buffer Select for Receive
Slot
Loop MST Internally
Data Channel Select for
Receive Slot
(B1_RSL, B2_RSL, AUX1_RSL and AUX2_RSL Register)
For Receive Slots
B1_RSL, B2_RSL, AUX1_RSL and AUX2_RSL
Register Bits
Bit 6 = '0'
Bit 6 = '1'
Bit 6 of MST_MODE1 Register
'0'
'1'
Bits[4:0] are for timeslot selection.
MUX Input B (Normal Operation)
MUX Input A (Internal Loop)
(Data In From STIO2 [MUX Input B])
(Data In From STIO1 [MUX Input A])
Cologne
Chip

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