HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 22

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

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Figure 5: FIFOs, CHANNELs and SLOTs in Transmit Direction
[T1]
[T2]
[T3]
FIFOs
In Simple Mode (SM) the CHANNEL number is the same as the FIFO number. If Channel Select
Mode (CSM) is enabled the transmit CHANNEL for a FIFO can be selected by
Please note that transmit CHANNELs are even numbered (bit 0 of CHANNEL# register = '0').
The bit values for the not processed bits of the transmit CHANNEL are read from the
CH_MASK register. The processed bits are taken from the FIFO (see also: Subchannel
Processing). Please note that more than one FIFO can transmit data to the same CHANNEL. This
is useful to combine subchannels and transmit them in one ISDN channel.
Data can either be transmitted to the S/T interface or the PCM interface.
The CON_HDLC register bits 7..5 settings must be the same for corresponding receive and
transmit FIFOs.
Transparent
HDLC
Data
Data
1) writing the FIFO number (0..7) in the FIFO# register
2) writing the desired CHANNEL number (0..7) to the CHANNEL# register (bits 2..0)
1) write the FIFO number (0..7) in the FIFO# register
2) write the desired connection to the CON_HDLC register bits 7..5
Transmit Channel
FIFO
Number
for FIFO
CHANNEL
Number
[T1]
for Transmit Channel
Bit Count / Start Bit /
Processing
Channel
Mask Bits
Sub-
[T2]
Transmit Channel
CONNECT
MEMORY
Select Data
Flow for
[T3]
see also: PCM Interface Function
for Transmit Channel
Select PCM Slot No.
CHANNEL
[T4]
SLOT
Cologne
Chip
S/T
PCM