HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 3

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

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Contents
Features........................................................................................................................................................ 6
1
1.1
1.2
1.3
2
2.1
2.2
2.3
2.4
2.5
2.6
2.7
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
4
4.1
4.2
4.3
4.4
5
6
6.1
3.1.1
3.2.1
3.2.2
3.2.3
4.1.1
4.1.2
6.1.1
6.1.2
6.1.3
6.1.4
General description............................................................................................................................ 6
Pin description.................................................................................................................................... 9
Functional description ..................................................................................................................... 12
3.2.1.1
3.2.1.2
3.2.1.3
3.2.1.4
3.2.1.5
Register description ......................................................................................................................... 29
Electrical characteristics ................................................................................................................. 47
Timing characteristics ..................................................................................................................... 50
Block diagram.................................................................................................................................. 7
Applications ..................................................................................................................................... 7
Processor interface modes ............................................................................................................... 8
S/T interface transmit signals .......................................................................................................... 9
S/T interface receive signals............................................................................................................ 9
PCM bus interface signals ............................................................................................................. 10
Processor interface signals............................................................................................................. 10
Miscellaneous pins......................................................................................................................... 11
Oscillator........................................................................................................................................ 11
Power supply.................................................................................................................................. 11
Microprocessor interface ............................................................................................................... 12
FIFOs ............................................................................................................................................. 13
Transparent mode of HFC-S mini.................................................................................................. 19
Correspondency between FIFOs, CHANNELs and SLOTs.......................................................... 20
Subchannel Processing .................................................................................................................. 25
PCM Interface Function................................................................................................................. 26
Configuring test loops.................................................................................................................... 28
Register reference list .................................................................................................................... 29
FIFO, interrupt, status and control registers .................................................................................. 31
PCM/GCI/IOM2 bus section registers........................................................................................... 39
S/T section registers....................................................................................................................... 43
Microprocessor access ................................................................................................................... 50
Register access ...................................................................................................................... 12
FIFO channel operation......................................................................................................... 14
FIFO initialization................................................................................................................. 18
FIFO reset.............................................................................................................................. 18
Registers by address.............................................................................................................. 29
Registers by name ................................................................................................................. 30
Register read access in de-multiplexed Motorola mode (mode 2)........................................ 50
Register write access in de-multiplexed Motorola mode (mode 2) ...................................... 51
Register read access in de-multiplexed Intel mode (mode 3) ............................................... 52
Register write access in de-multiplexed Intel mode (mode 3) .............................................. 53
Send channels (B1, B2, D and PCM transmit) ................................................................. 15
Automatically D-channel frame repetition ....................................................................... 15
FIFO full condition in send channels................................................................................ 16
Receive Channels (B1, B2, D and PCM receive) ............................................................. 16
FIFO full condition in receive channels ........................................................................... 17
Cologne
Chip