HFC-Smini Cologne Chip AG, HFC-Smini Datasheet - Page 21

• Manufacturer Part Number: HFC-Smini
• Manufacturer: Cologne Chip AG

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In Channel Select Mode (F_MODE register bit 7 = '1', CSM) FIFOs can be associated with arbitrary
CHANNELs.
FIFOs are selected by writing their number in the FIFO# register. All FIFOs are disabled after
initialization (reset). By setting at least one of the CON_HDLC register bits 3..1 to '1' the selected FIFO
is enabled.
The connection between a FIFO and a CHANNEL can be established by the CHANNEL# register for
each FIFO if Channel Select Mode is enabled (F_MODE register bit 7 = '1', CSM). Otherwise the
CHANNEL number equals the FIFO number.
The channels on the S/T interface (B1, B2, D and E) and PCM interface (B1, B2, AUX1 and AUX2) are
numbered as follows:
Table 3: CHANNEL Numbers on the S/T Interface and PCM Interface
The data flow between the HFC part (FIFOs), S/T interface and PCM interface can be selected by the
CON_HDLC register (bits 7..5) for each FIFO.
The PCM timeslot for B1, B2, AUX1 and AUX2 can be specified by the timeslot assigner (registers
B1_RSL, B1_SSL, B2_RSL, B2_SSL, AUX1_RSL, AUX1_SSL, AUX2_RSL and AUX2_SSL).
Data of a CHANNEL can furthermore be looped over the PCM interface (and the timeslot assigner).
(CHANNEL#, bits 2..0)
CHANNEL Number
'000'
'001'
'010'
'011'
'100'
'101'
'110'
'111'
ISDN Channel on the
S/T Interface
B1-transmit
B1-receive
B2-transmit
B2-receive
D-transmit
D-receive
invalid (E is receive only)
E-receive
ISDN Channel on the
PCM Interface
B1-transmit
B1-receive
B2-transmit
B2-receive
AUX1-transmit
AUX1-receive
AUX2-transmit
AUX2-receive
Cologne
Chip