IDT82P2288 Integrated Device Technology, Inc., IDT82P2288 Datasheet - Page 356
IDT82P2288
Manufacturer Part Number
IDT82P2288
Description
8 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet
1.IDT82P2288.pdf
(384 pages)
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IDT82P2288
G56K, GAP:
E1 Data Trunk Conditioning Code Register (20H ~ 3FH)
DTRK[7:0]:
SUBST[2:0] bits (b7~5, T1/J1-ID-01~18H).
Programming Information
Bit Name
Default
Bit No.
Type
These bits are valid in Transmit Clock Master mode when the PCCE bit (b0, E1-0CCH,...) is ‘1’.
These bits are the data trunk codes that can replace the data of the channel selected by the GSUBST[2:0] bits (b2~0, T1/J1-0CBH,...) or the
DTRK7
R/W
7
0
G56K
X
0
1
DTRK6
GAP
R/W
0
0
1
6
0
The corresponding timeslot is not gapped.
Bit 8 (LSB) of the corresponding timeslot is gapped (no clock signal during the Bit 8).
The corresponding timeslot is gapped (no clock signal during the timeslot).
DTRK5
R/W
5
0
DTRK4
R/W
4
0
345
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
Gap Mode
DTRK3
R/W
3
0
DTRK2
R/W
2
0
DTRK1
R/W
1
0
March 22, 2004
DTRK0
R/W
0
0
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