IDT82P2288 Integrated Device Technology, Inc., IDT82P2288 Datasheet - Page 195
IDT82P2288
Manufacturer Part Number
IDT82P2288
Description
8 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet
1.IDT82P2288.pdf
(384 pages)
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IDT82P2288
T1/J1 RHDLC1 Control Register (092H, 192H, 292H, 392H, 492H, 592H, 692H, 792H)
T1/J1 RHDLC2 Control Register (093H, 193H, 293H, 393H, 493H, 593H, 693H, 793H)
T1/J1 RHDLC3 Control Register (094H, 194H, 294H, 394H, 494H, 594H, 694H, 794H)
LSSUFIL:
FISUFIL:
ADRM[1:0]:
RHDLCM:
Programming Information
Bit Name
Bit Name
Bit Name
Default
Default
Default
Bit No.
Bit No.
Bit No.
Type
Type
Type
The function of the above three sets of registers are the same. However, they correspond to different RHDLC.
This bit is valid when the SS7 packet is LSSU.
= 0: The current LSSU is not compared with the previous one.
= 1: The current LSSU is compared with the previous one. The current LSSU will be discarded if it is the same with the previous LSSU.
This bit is valid when the SS7 packet is FISU.
= 0: The current FISU is not compared with the previous one.
= 1: The current FISU is compared with the previous one. The current FISU will be discarded if it is the same with the previous FISU.
These two bits select the address comparison mode in HDLC mode.
= 00: No address is compared.
= 01: High byte address is compared.
= 10: Low byte address is compared.
= 11: Both high byte address and low byte address are compared.
= 0: HDLC mode is selected.
= 1: SS7 mode is selected.
7
7
7
Reserved
Reserved
Reserved
6
6
6
LSSUFIL
LSSUFIL
LSSUFIL
R/W
R/W
R/W
5
0
5
0
5
0
FISUFIL
FISUFIL
FISUFIL
R/W
R/W
R/W
4
0
4
0
4
0
184
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
ADRM1
ADRM1
ADRM1
R/W
R/W
R/W
3
0
3
0
3
0
ADRM0
ADRM0
ADRM0
R/W
R/W
R/W
2
0
2
0
2
0
RHDLCM
RHDLCM
RHDLCM
R/W
R/W
R/W
1
0
1
0
1
0
March 22, 2004
RRST
RRST
RRST
R/W
R/W
R/W
0
0
0
0
0
0
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