IDT82P2288 Integrated Device Technology, Inc., IDT82P2288 Datasheet - Page 187

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IDT82P2288

Manufacturer Part Number
IDT82P2288
Description
8 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT82P2288
T1/J1 XBOC Code (080H, 180H, 280H, 380H, 480H, 580H, 680H, 780H)
XBOC[5:0]:
The BOM pattern is ‘111111110XBOC[0]XBOC[1]XBOC[2]XBOC[3]XBOC[4]XBOC[5]0’ which occupies the DL of the F-bit position.
T1/J1 BOC Control (081H, 181H, 281H, 381H, 481H, 581H, 681H, 781H)
AVC:
previous message.
previous message.
BOCE:
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
These bits are only valid in the ESF format.
When the XBOC[5:0] bits are written with any 6-bit code other than the ‘111111’, the code will be transmitted as the Bit Oriented Message (BOM).
This bit selects the validation criteria used to declare the Bit Oriented Message (BOM) in the received data stream. It is only valid in ESF format.
= 0: The BOM is declared when the pattern is matched and the received message is identical 8 out of 10 consecutive times and differs from the
= 1: The BOM is declared when the pattern is matched and the received message is identical 4 out of 5 consecutive times and differs from the
= 0: Disable the interrupt on the INT pin when the BOCI bit (b0, T1/J1-082H,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when the BOCI bit (b0, T1/J1-082H,...) is ‘1’.
7
7
Reserved
6
6
XBOC5
R/W
5
1
5
Reserved
XBOC4
R/W
4
1
4
176
OCTAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
XBOC3
R/W
3
1
3
XBOC2
R/W
2
1
2
XBOC1
R/W
AVC
R/W
1
1
1
0
March 22, 2004
XBOC0
BOCE
R/W
R/W
0
1
0
0

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