IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 64

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IDT82P2282

Manufacturer Part Number
IDT82P2282
Description
2 Channel T1/J1/E1 Transceiver
Manufacturer
Integrated Device Technology, Inc.
Datasheet

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IDT82P2282
read from or written into the specified indirect register is determined by
the RWN bit and the data is in the D[7:0] bits. The access status is indi-
Functional Description
Table 38: Related Bit / Register In Chapter 3.16
Note:
* ID means Indirect Register in the Receive Payload Control function block.
SIGFIX (T1/J1 only)
ABXX (T1/J1 only)
PRBSMODE[1:0]
POL (T1/J1 only)
ADDRESS[6:0]
GSUBST[2:0]
SUBST[2:0]
GSTRKEN
DTRK[7:0]
PRBSDIR
SIGSNAP
STRKEN
TESTEN
A,B,C,D
PCCE
BUSY
TEST
D[7:0]
OINV
SINV
EINV
RWN
Bit
ID - Channel Control (for T1/J1) / Timeslot Control (for E1)
TPLC / RPLC / PRGD Test Configuration
ID * - Signaling Trunk Conditioning Code
ID - Data Trunk Conditioning Code
RPLC Access Control
RPLC Control Enable
RPLC Access Status
RPLC Configuration
RPLC Access Data
Register
53
cated in the BUSY bit. Refer to Chapter 4.5 Indirect Register Access
Scheme for details about the indirect registers write/read access.
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
RPLC ID - 41~58 (for T1/J1) / 41~4F & 51~5F (for E1)
RPLC ID - 21~38 (for T1/J1) / 20~3F (for E1)
RPLC ID - 01~18 (for T1/J1) / 00~1F (for E1)
Address (Hex)
0CD, 1CD
0CE, 1CE
0D1, 1D1
0C7, 1C7
0D0, 1D0
0CF, 1CF
October 7, 2003

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