IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 4

• Manufacturer Part Number: IDT82P2282
• Description: 2 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2282
Table of Contents
3.9 PERFORMANCE MONITOR ........................................................................................................................................................................ 37
3.10 ALARM DETECTOR .................................................................................................................................................................................... 41
3.11 HDLC RECEIVER ......................................................................................................................................................................................... 44
3.12 BIT-ORIENTED MESSAGE RECEIVER (T1/J1 ONLY) .............................................................................................................................. 48
3.13 INBAND LOOPBACK CODE DETECTOR (T1/J1 ONLY) ........................................................................................................................... 48
3.14 ELASTIC STORE BUFFER .......................................................................................................................................................................... 49
3.15 RECEIVE CAS/RBS BUFFER ..................................................................................................................................................................... 49
3.16 RECEIVE PAYLOAD CONTROL ................................................................................................................................................................. 52
3.17 RECEIVE SYSTEM INTERFACE ................................................................................................................................................................. 54
3.18 TRANSMIT SYSTEM INTERFACE .............................................................................................................................................................. 61
3.9.1
3.9.2
3.10.1 T1/J1 Mode ...................................................................................................................................................................................... 41
3.10.2 E1 Mode .......................................................................................................................................................................................... 43
3.11.1 HDLC Channel Configuration ........................................................................................................................................................ 44
3.11.2 Two HDLC Modes ........................................................................................................................................................................... 44
3.15.1 T1/J1 Mode ...................................................................................................................................................................................... 49
3.15.2 E1 Mode .......................................................................................................................................................................................... 50
3.17.1 T1/J1 Mode ...................................................................................................................................................................................... 54
3.17.2 E1 Mode .......................................................................................................................................................................................... 59
3.18.1 T1/J1 Mode ...................................................................................................................................................................................... 61
3.18.2 E1 Mode .......................................................................................................................................................................................... 66
3.8.2.4
3.8.2.5
T1/J1 Mode ...................................................................................................................................................................................... 37
E1 Mode .......................................................................................................................................................................................... 39
3.11.2.1 HDLC Mode ...................................................................................................................................................................... 44
3.11.2.2 SS7 Mode ......................................................................................................................................................................... 46
3.17.1.1 Receive Clock Master Mode ............................................................................................................................................ 54
3.17.1.2 Receive Clock Slave Mode .............................................................................................................................................. 55
3.17.1.3 Receive Multiplexed Mode ............................................................................................................................................... 56
3.17.1.4 Offset ................................................................................................................................................................................ 56
3.17.1.5 Output On RSDn/MRSD & RSIGn/MRSIG ....................................................................................................................... 58
3.17.2.1 Receive Clock Master Mode ............................................................................................................................................ 59
3.17.2.2 Receive Clock Slave Mode .............................................................................................................................................. 59
3.17.2.3 Receive Multiplexed Mode ............................................................................................................................................... 60
3.17.2.4 Offset ................................................................................................................................................................................ 60
3.17.2.5 Output On RSDn/MRSD & RSIGn/MRSIG ....................................................................................................................... 60
3.18.1.1 Transmit Clock Master Mode ............................................................................................................................................ 61
3.18.1.2 Transmit Clock Slave Mode ............................................................................................................................................. 62
3.18.1.3 Transmit Multiplexed Mode .............................................................................................................................................. 63
3.18.1.4 Offset ................................................................................................................................................................................ 64
3.18.2.1 Transmit Clock Master Mode ............................................................................................................................................ 66
3.8.2.3.3
3.8.2.3.4
3.8.2.3.5
3.8.2.3.6
3.8.2.3.7
V5.2 Link .......................................................................................................................................................................... 35
Interrupt Summary ............................................................................................................................................................ 35
3.17.1.1.1 Receive Clock Master Full T1/J1 Mode ......................................................................................................... 54
3.17.1.1.2 Receive Clock Master Fractional T1/J1 Mode ............................................................................................... 55
3.17.2.1.1 Receive Clock Master Full E1 Mode ............................................................................................................. 59
3.17.2.1.2 Receive Clock Master Fractional E1 Mode ................................................................................................... 59
3.18.1.1.1 Transmit Clock Master Full T1/J1 Mode ........................................................................................................ 61
3.18.1.1.2 Transmit Clock Master Fractional T1/J1 Mode .............................................................................................. 62
3.18.2.1.1 Transmit Clock Master Full E1 Mode ............................................................................................................ 66
3.18.2.1.2 Transmit Clock Master Fractional E1 Mode .................................................................................................. 66
National Bit Extraction ................................................................................................................................... 34
National Bit Codeword Extraction .................................................................................................................. 34
Extra Bit Extraction ........................................................................................................................................ 34
Remote Signaling Multi-Frame Alarm Indication Bit Extraction ..................................................................... 34
Sa6 Code Detection Per ETS 300 233 .......................................................................................................... 34
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DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
October 7, 2003