IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 178

• Manufacturer Part Number: IDT82P2282
• Description: 2 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2282
T1/J1 Transmit Timing Option (070H, 170H)
XTS:
bypassed.
T1/J1 PRGD Control (071H, 171H)
RINV:
TINV:
PATS[1:0]:
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
In Transmit Clock Master mode:
= 0: The source of the transmit clock is selected from the clock generated by the internal clock generator (1.544 MHz).
= 1: The source of the transmit clock is selected from the recovered clock from the line side.
In Transmit Clock Master mode, the Transmit Buffer is bypassed automatically.
In Transmit Clock Slave T1/J1 mode E1 rate, this bit is invalid. In the other Transmit Clock Slave modes and in Transmit Multiplexed mode:
= 0: The source of the transmit clock is selected from the clock from the backplane. The Transmit Buffer is bypassed.
= 1: The source of the transmit clock is selected from the clock generated by the internal clock generator (1.544 MHz). The Transmit Buffer is not
= 0: The data is not inverted before extracted to the pattern detector.
= 1: The data is inverted before extracted to the pattern detector.
= 0: The generated pattern is not inverted.
= 1: The generated pattern is inverted.
These bits select the PRBS generated and detected pattern.
= 00: The 2
= 01: The 2
= 10: The 2
= 11: Reserved.
15
20
11
-1 pattern per O.150 is selected.
-1 pattern per O.152 is selected.
-1 pattern per O.150-4.5 is selected.
7
7
6
6
Reserved
5
5
Reserved
4
4
167
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
RINV
R/W
3
3
0
TINV
R/W
2
2
0
PATS1
R/W
1
1
0
October 7, 2003
PATS0
XTS
R/W
R/W
0
0
0
0