IDT82P2282 Integrated Device Technology, Inc., IDT82P2282 Datasheet - Page 156

• Manufacturer Part Number: IDT82P2282
• Description: 2 Channel T1/J1/E1 Transceiver
• Manufacturer: Integrated Device Technology, Inc.

IDT82P2282
T1/J1 TBIF TS Offset (044H, 144H)
TSOFF[6:0]:
start of the corresponding frame input on the TSDn/MTSD pin. The signaling bits on the TSIGn/MTSIG pin are always per-channel aligned with the
data on the TSDn/MTSD pin.
set can be configured from 0 to 127 channels (0 & 127 are included).
T1/J1 TBIF Bit Offset (045H, 145H)
EDGE:
BOFF[2:0]:
corresponding frame input on the TSDn/MTSD pin. The signaling bits on the TSIGn/MTSIG pin are always per-channel aligned with the data on the
TSDn/MTSD pin.
Programming Information
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
Type
Type
These bits give a binary number to define the channel offset. The channel offset is between the framing pulse on the TSFSn/MTSFS pin and the
In Non-multiplexed mode, the channel offset can be configured from 0 to 23 channels (0 & 23 are included). In Multiplexed mode, the channel off-
This bit is valid when the CMS bit (b2, T1/J1-042H,...) is ‘1’.
= 0: The first active edge of TSCKn/MTSCK is selected to sample the data on the TSDn/MTSD and TSIGn/MTSIG pins.
= 1: The second active edge of TSCKn/MTSCK is selected to sample the data on the TSDn/MTSD and TSIGn/MTSIG pins.
These bits give a binary number to define the bit offset. The bit offset is between the framing pulse on the TSFSn/MTSFS pin and the start of the
Reserved
7
7
TSOFF6
R/W
6
0
6
Reserved
TSOFF5
R/W
5
0
5
TSOFF4
R/W
4
0
4
145
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
TSOFF3
EDGE
R/W
R/W
3
0
3
0
TSOFF2
BOFF2
R/W
R/W
2
0
2
0
TSOFF1
BOFF1
R/W
R/W
1
0
1
0
October 7, 2003
TSOFF0
BOFF0
R/W
R/W
0
0
0
0