CMX981 Consumer Microcircuits Limited, CMX981 Datasheet - Page 46

• Manufacturer Part Number: CMX981
• Description: Advanceddigital Radio Baseband Processor (tetra Etc.)
• Manufacturer: Consumer Microcircuits Limited

Advanced Digital Radio Baseband Processor
6.
6.1
6.2
 2002 CML Microsystems Plc
Application Notes
Interrupt Handling
Interrupt handling requires an extra read to clear the source of the interrupt. Handling interrupts is
sometimes a source of confusion. The notes below are intended to clarify the operation of
interrupts:
Tx FIFO Status Interrupts
These interrupts can only be cleared by first carrying out the appropriate action to stop the source
of the Tx FIFO interrupt (this would usually require writing some data to the Tx FIFO) and then
carrying out a further read on the Status1 register to reset the N_IRQ1 (or N_IRQ2) pin.
Tx/Rx FIR filter overflow, and gain, phase and offset overflow interrupts
A typical interrupt handling procedure for Tx (the same can be applied to Rx) would be:
Rx ADC I and Q channel overflow - due to excessive input amplitude interrupts
These interrupts will remain set until the source of the excessive amplitude has been reduced to
below the acceptable level. Once this has been achieved, the Status3 register can be read in
order to reset the interrupt pin.
Developing and Optimising FIR Filter Coefficients
If it is required to re-optimise FIR filter coefficients for a different application, or to compensate for
the behaviour of components external to the CMX981, the default coefficients can be overwritten.
There are many ways to develop FIR filter coefficients for a non-TETRA application.
The basic algorithm is to take the required frequency domain response, apply an inverse Fourier
transform and use a windowing function to reduce the impulse response to the desired length. The
impulse response is then identical to the required FIR coefficients. In the case of the CMX981,
both transmit and receive filters are configured as two cascaded filters. When developing
customised coefficients, the user has a choice of whether to design the two filters separately or to
develop a single filter and then factorise the resultant polynomial in z (representing the impulse
response of the overall FIR filter) into two shorter polynomials of appropriate length. Various
commercial and public domain software is available which may help with this process.
In order to develop optimal FIR filter coefficients for the CMX981, knowledge of the non-
programmable filters in the design is required, together with a more detailed understanding of the
function of certain external components. Please refer to the block diagram in figure 1 and the
external components diagrams in figures 2a and 2b.
The combined effect of all of the filters in the Tx or Rx, when using default FIR coefficients, is to
give a linear phase root raised cosine filter shape, with a symbol rate of MCLK/512 and
This tracks fairly well with MCLK frequency, provided that the dominant external RC poles (R3/C3
for Tx, R2/C2 for Rx, as shown in figure 2a and 2b) are also scaled with MCLK. For the case of
MCLK = 8.192MHz, this means increasing the RC products by approximately 10%.
There is a small attenuation caused by two pole on-chip continuous time filters in both the Tx and
Rx, which do not scale with MCLK. This will cause attenuation at 10kHz of between 0.05dB and
0.15dB in the Rx, and between 0.03dB and 0.08dB in the Tx. This effect can be ignored in many
applications, but is described here for completeness. These filters can be bypassed by setting bits
6 and 7 in the LoopBackCtrl register.
Read the Status2 register and confirm that a Tx FIR filter error has occurred.
This will reset the N_IRQ1 (or N_IRQ2) pin.
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CMX981
D/981/1
= 0.35.