CMX981 Consumer Microcircuits Limited, CMX981 Datasheet - Page 29

• Manufacturer Part Number: CMX981
• Description: Advanceddigital Radio Baseband Processor (tetra Etc.)
• Manufacturer: Consumer Microcircuits Limited

Advanced Digital Radio Baseband Processor
5.11.12 $0E
5.11.13 $0F
 2002 CML Microsystems Plc
Bit 6 is set high when an overflow occurs in the gain and offset block for the Q channel.
Bit 5 is set high when an overflow occurs in the gain and offset block for the I channel.
Bit 4 is set high when an overflow occurs in the receive path decimation filter.
Bit 3 is set high when an overflow occurs in the receive path low-pass filter.
Bit 2 is set high when an overflow occurs in the receive path root-raised-cosine filter.
When bit 1 is high, the associated interrupt may be used to re-synchronise the Rx data if for any
reason data synchronisation is lost. If the corresponding bit in Mask3 is unmasked, an interrupt
will be generated on the next Q-phase data in the Rx output register. The next falling edge of
SCLK with RxFS high indicates the LSB of the Q channel data. This interrupt should then be
masked to prevent continuous Q-phase interrupts.
Bit 0 is set high when a status bit in this register causes an interrupt.
If any of these bits are set high, they are latched until this register is read.
Setting any of these bits high will unmask the corresponding interrupts in the Status3 register.
Bit
Bit
Undefined
Not used.
on read
Not used.
Set this
bit low.
7
7
Status3
Mask3
Receive Q
Unmask Q
overflow
overflow
channel
channel
6
6
Unmask I
Receive I
overflow
channel
overflow
channel
5
5
Status Register 3 (Read only)
Interrupt Mask Register 3
decimation
Decimation
Unmask
overflow
29
overflow`
filter
filter
4
4
pass filter
Unmask
overflow
Rx low-
pass filter
overflow
Rx low-
3
3
Unmask
Rx RRC
overflow
overflow`
Rx RRC
filter
filter
2
2
Unmask
sample
phase
even
sample
phase
Even
1
1
Not used.
Set this
bit low.
Rx IRQ
active.
0
CMX981
D/981/1
0