CMX981 Consumer Microcircuits Limited, CMX981 Datasheet - Page 25

• Manufacturer Part Number: CMX981
• Description: Advanceddigital Radio Baseband Processor (tetra Etc.)
• Manufacturer: Consumer Microcircuits Limited

Advanced Digital Radio Baseband Processor
5.11.3 $02
5.11.4 $03
 2002 CML Microsystems Plc
Bit
Setting bit 7 high will cause the codec sample clock to appear on the N_IRQ2 pin.
Bits 6 to 4 enable interrupts generated by the status registers to appear on the N_IRQ2 pin.
Setting bit 3 high will cause the internal sample clock to appear on the N_IRQ1 pin.
Bits 2 to 0 enable interrupts generated by the status registers to appear on the N_IRQ1 pin.
When bit 7 is set high, the internal symbol clock is adjusted to the next sample clock when the
transmit path is enabled. This allows transmission of data to commence on the next sample clock.
For this function to be useful, a data word must be written to the FIFO with the ramp up bit set
before enabling the transmit data path.
Bit 6 will change the input sample rate of the transmit 79-tap FIR filter from the symbol rate to the
sample rate for direct write access. This bit should be set low when direct write access is disabled.
Bit 5 will enable the transmit direct write access mode, allowing samples to be written directly to
the transmit 79-tap FIR filter.
Bit 4 will bypass the transmit symbol modulator; thereby taking the 3 least significant bits of each
transmit word written to the FIFO to represent an absolute constellation mapping.
Bit 3 enables the transmit data path, allowing transmission to start. This bit should only be cleared
when the transmit path enable status bit in the Status1 register has been cleared.
Bit 2 selects between linear ramping when set high, and sigmoidal ramping when set low.
Bit 1 enables transmit amplitude ramping (linear or sigmoidal). Setting this bit low causes the
Ramp up bit of the TxData register to directly control the output amplitude (High meaning full
amplitude, low meaning zero amplitude).
Setting bit 0 high will cause the transmit path filter coefficients to return to their default values. This
bit should be set low while writing new coefficients.
Codec sample clock to
Bit
N_IRQ2
symbol
7
adjust
clock
Auto
7
IRQCtrl
TxSetup
Enable direct
write access
at sample
Status3 to
rate
N_IRQ2
6
6
Status2 to
Enable
access
direct
N_IRQ2
write
5
5
Interrupt Control Register
Transmit Set-up Register
modulator
Bypass
symbol
25
Status1 to
N_IRQ2
4
4
data path
transmit
Enable
Sample clock
to N_IRQ1
3
3
ramping
Select
mode
2
Status3 to
N_IRQ1
2
ramping
Enable
1
Status2 to
N_IRQ1
1
coefficients
Reset Tx
filter
0
Status1 to
CMX981
D/981/1
N_IRQ1
0