CMX981 Consumer Microcircuits Limited, CMX981 Datasheet - Page 33

• Manufacturer Part Number: CMX981
• Description: Advanceddigital Radio Baseband Processor (tetra Etc.)
• Manufacturer: Consumer Microcircuits Limited

Advanced Digital Radio Baseband Processor
5.11.20 $16
5.11.21 $17
 2002 CML Microsystems Plc
Bit
Bit 2 selects the conversion rate of the ADC. If set low, the ADC will be clocked at MCLK/8, giving
a conversion time of 80 MCLK periods per enabled channel. Setting this bit high halves the ADC
clock rate and doubles the conversion time.
Setting bit 1 high will cause each enabled channel to be converted continuously.
Setting bit 0 high will cause a single conversion of all enabled channels. This bit is automatically
set low when the conversion has been completed.
When bit 7 is set low, the default ramp delay time is used (75 samples). When bit 7 is set high, the
number stored in bits 6 to 0 is used.
Bit
Set this bit
Not used.
low.
7
Disable default
delay
7
Set this bit
Not used.
AuxAdcCtrl2
RampCtrl
low.
6
Set this bit
Not used.
6
low.
5
5
Set this bit
Not used.
low.
Auxiliary ADC Control Register 2
Transmit Path Ramping Delay Register
4
33
Number of samples delay time
4
Set this bit
Not used.
low.
3
3
conversion
Select
rate
2
2
continuous
conversion
Enable
1
1
conversion
Start
0
0
CMX981
D/981/1