CMX981 Consumer Microcircuits Limited, CMX981 Datasheet - Page 28

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CMX981

Manufacturer Part Number
CMX981
Description
Advanceddigital Radio Baseband Processor (tetra Etc.)
Manufacturer
Consumer Microcircuits Limited
Datasheet

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 2002 CML Microsystems Plc
Bit 6 is set high when the voice codec writes a data sample to the CodecData register.
Bit 5 is set high when an overflow occurs in the gain, phase and offset adjustment block for the Q
channel.
Bit 4 is set high when an overflow occurs in the gain, phase and offset adjustment block for the I
channel.
Bit 3 is the internal symbol clock enable signal. When bit 3 in Mask2 is set high, this signal is
unmasked and appears on an interrupt pin.
Bit 2 is set high when an overflow occurs in the transmit 63-tap filter.
Bit 1 is set high when an overflow occurs in the transmit 79-tap filter.
Bit 0 is set high when a status bit in this register causes an interrupt.
If any of these bits are set high, except bit 3, they will be latched until this register is read.
Setting any of these bits high will unmask the corresponding interrupts in the Status2 register.
Bit
Bit
Undefined
Not used.
Not used.
on read.
Set this
bit low.
7
7
Status2
Mask2
Unmask
Codec
codec
ready
ready
data
data
6
6
Transmit Q
transmit Q
Unmask
overflow
overflow
channel
channel
5
5
Status Register 2 (Read only)
Interrupt Mask Register 2
28
Transmit I
transmit I
Unmask
overflow
channel
overflow
channel
4
4
Unmask
symbol
enable
Symbol
enable
clock
clock
3
3
Unmask
transmit
overflow
Transmit
overflow
63-tap
63-tap
filter
filter
2
2
Unmask
overflow
transmit
Transmit
overflow
79-tap
79-tap
filter
filter
1
1
Not used.
Transmit
Set this
bit low.
active
CMX981
D/981/1
IRQ
0
0

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