CMX981 Consumer Microcircuits Limited, CMX981 Datasheet - Page 30

• Manufacturer Part Number: CMX981
• Description: Advanceddigital Radio Baseband Processor (tetra Etc.)
• Manufacturer: Consumer Microcircuits Limited

Advanced Digital Radio Baseband Processor
5.11.14 $10
5.11.15 $11
 2002 CML Microsystems Plc
Any write operation to this register will cause the symbol clock phase to change by the value
written in bits 2 to 0. A read operation will return the last phase change value written to this
register.
Bit 5 will cause the transmit path enable bit (bit 3 of the TxSetup register) to gate the transmit path
master clock.
Bit 4 will disable the transmit FIFO clock, reducing power consumption. Ensure this bit is set high
before commencing FIFO operations.
Bit 3 will power down the receive data port.
Bit 2 will power down the auxiliary RAM DAC.
Bit 1 will enable the serial interface auto clock stop mode. When set active the serial interface will
power down if no frame sync activity is detected after 6-7 symbol periods. Asserting any frame
sync input signal will restart the serial interface. Note: this mode is only available when the serial
clock is set to MCLK/4
Bit 0 will cause the receive path enable bit (bit 3 of the RxSetup1 register) to gate the receive path
master clock.
Bit
Bit
Not Used.
Not Used.
Set this
Set this
bit low
bit low
7
7
SymClkPhase
ClkStopCtrl
Bit 2
0
0
0
0
1
1
1
1
Not Used.
Not Used.
Set this
Set this
bit low
bit low
6
6
Bit 1
0
0
1
1
0
0
1
1
auto clock
Not Used.
Set this
bit low
Set Tx
mode
stop
5
5
Bit 0
0
1
0
1
0
1
0
1
Symbol Clock Phase Adjustment Register
Clock Stop Control Register
30
clock stop
Not Used.
Set FIFO
Set this
bit low
mode
4
4
Advance 1/2 symbol
Advance 3/8 symbol
Advance 1/4 symbol
Advance 1/8 symbol
Retard 1/8 symbol
Retard 1/4 symbol
Retard 3/8 symbol
No phase change
Phase change
Not Used.
port clock
Set this
receive
bit low
Stop
3
3
Stop Aux
clock
RAM
DAC
2
2
Phase change
auto clock
Set serial
interface
mode
stop
1
1
auto clock
Set Rx
mode
stop
0
0
CMX981
D/981/1