ST72325R6-AUTO STMicroelectronics, ST72325R6-AUTO Datasheet - Page 248
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ST72325R6-AUTO
Manufacturer Part Number
ST72325R6-AUTO
Description
8-bit Mcu For Automotive With 16 To 60 Kbyte Flash, Adc, Css, 5 Timers, Spi, Sci, I2c Interface
Manufacturer
STMicroelectronics
Datasheet
1.ST72325R6-AUTO.pdf
(250 pages)
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Known limitations
22.1.6
22.1.7
22.1.8
248/250
TIMD set simultaneously with OC interrupt
If the 16-bit timer is disabled at the same time the output compare event occurs, the output
compare flag then gets locked and cannot be cleared before the timer is enabled again.
Impact on the application
If the output compare interrupt is enabled, then the output compare flag cannot be cleared in
the timer interrupt routine. Consequently, the interrupt service routine is called repeatedly.
Workaround
Disable the timer interrupt before disabling the timer. Again while enabling, first enable the
timer, then the timer interrupts.
●
●
I2C multimaster
In multimaster configurations, if the ST7 I2C receives a START condition from another I2C
master after the START bit is set in the I2CCR register and before the START condition is
generated by the ST7 I2C, it may ignore the START condition from the other I2C master. In
this case, the ST7 master will receive a NACK from the other device. On reception of the
NACK, ST7 can send a restart and Slave address to re-initiate communication.
Pull-up always active on PE2
The I/O port internal pull-up is always active on I/O port E2. As a result, if PE2 is in output
mode low level, current consumption in Halt/Active Halt mode is increased.
Perform the following to disable the timer:
–
–
Perform the following to enable the timer again:
–
–
TACR1 or TBCR1 = 0x00h; // Disable the compare interrupt
TACSR | or TBCSR | = 0x40; // Disable the timer
TACSR & or TBCSR & = ~0x40; // Enable the timer
TACR1 or TBCR1 = 0x40; // Enable the compare interrupt
ST72325xxx-Auto
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