ST72325R6-AUTO STMicroelectronics, ST72325R6-AUTO Datasheet - Page 165
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ST72325R6-AUTO
Manufacturer Part Number
ST72325R6-AUTO
Description
8-bit Mcu For Automotive With 16 To 60 Kbyte Flash, Adc, Css, 5 Timers, Spi, Sci, I2c Interface
Manufacturer
STMicroelectronics
Datasheet
1.ST72325R6-AUTO.pdf
(250 pages)
- Current page: 165 of 250
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ST72325xxx-Auto
16.3
16.3.1
16.3.2
General description
In addition to receiving and transmitting data, this interface converts it from serial to parallel
format and vice versa, using either an interrupt or polled handshake. The interrupts are
enabled or disabled by software. The interface is connected to the I
(SDAI) and by a clock pin (SCLI). It can be connected both with a standard I
fast I
Mode selection
The interface can operate in the four following modes:
●
●
By default, it operates in slave mode.
The interface automatically switches from slave to master after it generates a START
condition and from master to slave in case of arbitration loss or a STOP generation, allowing
then Multimaster capability.
Communication flow
In Master mode, it initiates a data transfer and generates the clock signal. A serial data
transfer always begins with a start condition and ends with a stop condition. Both start and
stop conditions are generated in master mode by software.
In Slave mode, the interface is capable of recognizing its own address (7- or 10-bit), and the
General Call address. The General Call address detection may be enabled or disabled by
software.
Data and addresses are transferred as 8-bit bytes, MSB first. The first byte(s) following the
start condition contain the address (one in 7-bit mode, two in 10-bit mode). The address is
always transmitted in Master mode.
A 9th clock pulse follows the 8 clock cycles of a byte transfer, during which the receiver must
send an acknowledge bit to the transmitter. Refer to
Figure 68. I
Acknowledge may be enabled and disabled by software.
The I
The speed of the I
I
2
C (up to 400 kHz).
Slave transmitter/receiver
Master transmitter/receiver
2
2
C bus. This selection is made by software.
C interface address and/or general call address can be selected by software.
SCL
SDA
2
CONDITION
C bus protocol
START
2
C interface may be selected between standard (up to 100 kHz) and fast
MSB
1
2
Figure
8
68.
ACK
9
2
I2C bus interface (I2C)
C bus by a data pin
CONDITION
STOP
2
C bus and a
VR02119B
165/250
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