ST72325R6-AUTO STMicroelectronics, ST72325R6-AUTO Datasheet - Page 135
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ST72325R6-AUTO
Manufacturer Part Number
ST72325R6-AUTO
Description
8-bit Mcu For Automotive With 16 To 60 Kbyte Flash, Adc, Css, 5 Timers, Spi, Sci, I2c Interface
Manufacturer
STMicroelectronics
Datasheet
1.ST72325R6-AUTO.pdf
(250 pages)
- Current page: 135 of 250
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ST72325xxx-Auto
14.4
Note:
Note:
The SPIF bit can be cleared during a second transmission; however, it must be cleared
before the second SPIF bit in order to prevent an Overrun condition (see
(OVR) on page
Clock phase and clock polarity
Four possible timing relationships may be chosen by software, using the CPOL and CPHA
bits (see
The idle state of SCK must correspond to the polarity selected in the SPICSR register (by
pulling up SCK if CPOL = 1 or pulling down SCK if CPOL = 0).
The combination of the CPOL clock polarity and CPHA (clock phase) bits selects the data
capture clock edge
Figure 61
The diagram may be interpreted as a master or slave timing diagram where the SCK pin, the
MISO pin, the MOSI pin are directly connected between the master and the slave device.
If CPOL is changed at the communication byte boundaries, the SPI must be disabled by
resetting the SPE bit.
Figure
shows an SPI transfer with the four combinations of the CPHA and CPOL bits.
137).
61).
Serial peripheral interface (SPI)
Overrun condition
135/250
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