ST72325R6-AUTO STMicroelectronics, ST72325R6-AUTO Datasheet - Page 16
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ST72325R6-AUTO
Manufacturer Part Number
ST72325R6-AUTO
Description
8-bit Mcu For Automotive With 16 To 60 Kbyte Flash, Adc, Css, 5 Timers, Spi, Sci, I2c Interface
Manufacturer
STMicroelectronics
Datasheet
1.ST72325R6-AUTO.pdf
(250 pages)
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List of figures
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Figure 99.
Figure 100. 64-pin (14x14) low profile quad flat package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
16/250
Input capture timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Output compare block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Output compare timing diagram, fTIMER = fCPU/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Output compare timing diagram, fTIMER = fCPU/4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
One pulse mode cycle flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
One pulse mode timing example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Pulse width modulation mode timing example with 2 output compare functions . . . . . . . 119
Pulse width modulation cycle flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Serial peripheral interface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Single master/single slave application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Generic SS timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Hardware/Software slave select management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Data clock timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Clearing the WCOL bit (Write Collision Flag) software sequence . . . . . . . . . . . . . . . . . . 138
Single master / multiple slave configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
SCI block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Word length programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
SCI baud rate and extended prescaler block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Bit sampling in reception mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
I2C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
I2C interface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Transfer sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
Interrupt control logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
ADC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
fCPU max versus V
Typical application with an external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203
Typical application with a crystal or ceramic resonator. . . . . . . . . . . . . . . . . . . . . . . . . . . 204
Typical fOSC(RCINT) versus TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 205
Integrated PLL jitter versus signal frequency(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
Unused I/O pins configured as input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Typical IPU vs VDD with VIN = VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
Typical VOL at VDD = 5V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Typical VOL at VDD = 5V (high-sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Typical VOH at VDD = 5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Typical VOL versus VDD (standard). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Typical VOL versus VDD (high-sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Typical VDD-VOH versus VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
RESET pin protection when LVD is enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
RESET pin protection when LVD is disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
Two typical applications with ICCSEL/VPP pin(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217
SPI slave timing diagram with CPHA = 0(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
SPI slave timing diagram with CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
SPI master timing diagram(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
Typical application with I2C BUS and timing diagram(1) . . . . . . . . . . . . . . . . . . . . . . . . . 223
RAIN maximum versus fADC with CAIN = 0pF(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Recommended CAIN and RAIN values(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Typical A/D converter application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
Power supply filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 226
ADC error classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
ST72325xxx-Auto
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