A43L2616-PH Series AMIC Technology, Corp., A43L2616-PH Series Datasheet - Page 30

• Manufacturer Part Number: A43L2616-PH Series
• Description: 1M x 16 Bit x 4 Banks Synchronous DRAM
• Manufacturer: AMIC Technology, Corp.

(May, 2002, Version 0.0)
Read & Write Cycle with Auto Precharge @Burst Length=4
CLOCK
A10/AP
ADDR
(CL=2)
(CL=3)
CKE
RAS
CAS
DQM
BS1
BS0
CS
DQ
DQ
WE
*Note : tRCD should be controlled to meet minimum tRAS before internal precharge start.
0
Row Active
(A-Bank)
RAa
RAa
1
(In the case of Burst Length=1 & 2, BRSW mode)
2
3
Row Active
(D-Bank)
RBb
RBb
4
Auto Precharge
Read with
(A-Bank)
CAa
5
6
QAa0
7
QAa1
QAa0
Auto Precharge
(A-Bank/CL=2)
8
Start Point
QAa2
QAa1
9
Auto Precharge
30
(A-Bank/CL=3)
High
Start Point
QAa3
QAa2
10
QAa3
11
12
Auto Precharge
13
Write with
(D-Bank)
DDb0 DDb1 DDb2 DDb3
DDb0
CBb
14
A43L2616-PH Series
AMIC Technology, Inc.
DDb1 DDb2 DDb3
15
16
17
: Don't care
Auto Precharge
18
Start Point
(D-Bank)
19