MSC8102D Motorola / Freescale Semiconductor, MSC8102D Datasheet - Page 26

• Manufacturer Part Number: MSC8102D
• Description: Quad Core 16-Bit Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

GPIO, TDM, UART, and Timer Signals
1-18
Signal Name
GPIO16
TDM1TCLK
DONE1
DRACK1
GPIO17
TDM1TDAT
DACK1
GPIO18
TDM1RSYN
DREQ2
GPIO19
TDM1RCLK
DACK2
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Type
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Table 1-7. GPIO, TDM, UART, and Timer Signals (Continued)
Input
Input
General-Purpose Input Output 16
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs. For details, refer to the MSC8102 Reference Manual GPIO programing
model.
TDM1 Transmit Clock
Transmit Clock for TDM 1.
DMA Done 1
Signifies that the channel must be terminated. If the DMA generates DONE, the channel
handling this peripheral is inactive. As an input to the DMA, DONE closes the channel
much like a normal channel closing.
See the MSC8102 Reference Manual chapters on DMA and GPIO for information on
configuring the DRACK or DONE mode and pin direction.
DMA Data Request Acknowledge 1
Asserted by the DMA controller to indicate that the DMA controller has sampled the
peripheral request.
General-Purpose Input Output 17
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs. For details, refer to the MSC8102 Reference Manual GPIO programing
model.
TDM1 Serial Transmitter Data
The transmit data signal for TDM 1. As an output, this can be the DATA_D data signal for
TDM 1.For configuration details, refer to the MSC8102 Reference Manual chapter
describing TDM operation.
DMA Acknowledge 1
The DMA controller drives this output to acknowledge the DMA transaction on the bus.
General-Purpose Input Output 18
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs. For details, refer to the MSC8102 Reference Manual GPIO programing
model.
TDM1 Receive Frame Sync
The receive sync signal for TDM 1. As an input, this can be the DATA_B data signal for
TDM 1. For configuration details, refer to the MSC8102 Reference Manual chapter
describing TDM operation.
DMA Request 1
Used by an external peripheral to request DMA service.
General-Purpose Input Output 19
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs. For details, refer to the MSC8102 Reference Manual GPIO programing
model.
TDM1 Receive Clock
The receive clock signal for TDM 1. As an input, this can be the DATA_C data signal for
TDM 1. For configuration details, refer to the MSC8102 Reference Manual chapter
describing TDM operation.
DMA Acknowledge 2
The DMA controller drives this output to acknowledge the DMA transaction on the bus.
Description