TMP86xy12MG Toshiba, TMP86xy12MG Datasheet - Page 89

• Manufacturer Part Number: TMP86xy12MG
• Manufacturer: Toshiba

Specifications of TMP86xy12MG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: -
• Timer Counter 18-bit Channel: IGBT
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4.5 to 5.5

9.4 Features
9.4.1.3 PPG1/PPG2 independent mode
Source clock
Counter
Dead time
Pulse width
Period
PPG1 output
PPG2 output
INTTC7T
INTTC7P
(3)
(1)
Command and Capture Start, Positive Logic, Continuous Output
the PPG2 output, specify the dead time in the TC7DRD and pulse width in the TC7DRE. With a
common period specified in the TC7DRC, the PPG1 and PPG2 pins provide waveforms having the
specified pulse widths.
S, 0
Valid range for data register values
(a) Period:
(b) Pulse width:
(c) Dead time:
Description
For the PPG1 output, specify the dead time in the TC7DRA and pulse width in the TC7DRB. For
Figure 9-5 Example Operation in Variable Duty Mode:
1
002H ≤ TC7DRB + TC7DRA < TC7DRC ≤ 400H
(Writing 400H to TC7DRC results in 000H being read from it.)
001H ≤ TC7DRB < TC7DRC
000H ≤ TC7DRA < TC7DRB, 000H ≤ TC7DRA < (TC7DRC – TC7DRB)
(To specify no dead time, set the TC7DRA to 000H.)
M: Dead time
(TC7DRA)
Dead time
M
N
S
Pulse width
N:
Pulse width
M
(TC7DRB)
Active duration
S:
Period
Period
Page 78
N
(TC7DRC)
N+1
Pulse width
M: Dead time
Dead time
(TC7DRA)
(TC7DRC
N+M
Active duration
−
TC7DRB)
S, 0
1
M '
N '
S
2
TMP86CH12MG
3