TMP86xy12MG Toshiba, TMP86xy12MG Datasheet - Page 101

• Manufacturer Part Number: TMP86xy12MG
• Manufacturer: Toshiba

Specifications of TMP86xy12MG

• Package: SSOP30
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 16
• Ram Size: 512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: -
• Timer Counter 18-bit Channel: IGBT
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 24
• Power Supply (v): 4.5 to 5.5

9.4 Features
After
noise
elimination
fc
fc/2
fc/4
TC7 pin input
(after passing
through F/F)
Table 9-1 Noise Canceller Settings
TC7 input
NCRSEL
00
01
10
11
When NCRSEL = 00
When NCRSEL = 01
When NCRSEL = 10
• When NCRSEL = 00, a TC7 input level after passing through the F/F is always canceled if its duration
• When NCRSEL = 01, a TC7 input level after passing through the F/F is always canceled if its duration
• When NCRSEL = 10, a TC7 input level after passing through the F/F is always canceled if its duration
• When NCRSEL = 11, a pulse shorter than 1/fc may be assumed as a signal or canceled as noise in the
(Number of Samplings)
Sampling Frequency
is 16/fc [s] or less and always assumed as a signal if its duration is 20/fc [s] or greater. After the input
signal supplied on the TC7 pin passes through the F/F, there is a delay between 21/fc [s] and 24/fc [s]
before the PPG outputs vary.
is 8/fc [s] or less and always assumed as a signal if its duration is 10/fc [s] or greater. After the input
signal supplied on the TC7 pin passes through the F/F, there is a delay between 13/fc [s] and 14/fc [s]
before the PPG outputs vary.
is 4/fc [s] or less and always assumed as a signal if its duration is 5/fc [s] or greater. After the input sig-
nal supplied on the TC7 pin passes through the F/F, there is a delay of 5/fc [s] before the PPG outputs
vary.
first-stage F/F. Ensure that input signal pulses are longer than 1/fc. After the input signal supplied on
the TC7 pin passes through the F/F, there is a delay of 4/fc [s] before the PPG outputs vary.
F/F
fc
Pulses of 4/fc or shorter are canceled.
fc/4 (5)
fc/2 (5)
(None)
fc (5)
fc/4
fc/2
fc
1 2 3 4 5
1
1
NCRSEL
A
B
C
2
Pulses of 16/fc or shorter are canceled.
Figure 9-19 Noise Canceller Operation
Pulses of 8/fc or shorter are canceled.
Noise canceller
Z
3
2
16/fc [s]
8/fc [s]
4/fc [s]
Pulse Width Always Assumed as Noise
4
None
Sampling
clock
5
3
At 8 MHz
0.5 [ms]
2 [ms]
1 [ms]
Page 90
–
4
NCRSEL = 11
B
A
S
1 2 3 4 5
Z
1
1
At 16 MHz
500 [ns]
250 [ns]
1 [ms]
–
2
Edge detection
3
2
Pulses of 5/fc or longer are assumed as a signal.
4
20/fc [s]
10/fc [s]
Pulse Width Always Assumed as Signal
5/fc [s]
(1/fc)
5
3
Pulses of 10/fc or longer are assumed as a signal.
PPG output control
0.625 [ms]
At 8 MHz
1.25 [ms]
2.5 [ms]
circuit
4
Pulses of 20/fc
or longer are assumed
as a signal.
5
TMP86CH12MG
0.3125 [ms]
At 16 MHz
0.625 [ms]
1.25 [ms]
PPG output