TMP86xy12MG Toshiba, TMP86xy12MG Datasheet - Page 80
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TMP86xy12MG
Manufacturer Part Number
TMP86xy12MG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY12MG.pdf
(183 pages)
Specifications of TMP86xy12MG
Package
SSOP30
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
16
Ram Size
512
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
-
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
8
Da Converter Channels
-
Timer Counter 18-bit Channel
IGBT
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
24
Power Supply (v)
4.5 to 5.5
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8. Real-Time Clock
8.1 Configuration
8.2 Control of the RTC
RTC Control Register
(001BH)
RTCCR
interrupt (0.0625[s],0.125[s],0.25[s],0.50[s]) at a programmed interval, implement the clock function. The RTC can
be used in the mode in which the low-frequency oscillator is active (except for the SLEEP0 mode).
The TMP86CH12MG include a real time counter (RTC). A low-frequency clock can be used to provide a periodic
The RTC is controlled by the RTC control register (RTCCR).
Note 1: Program the RTCCR during low-frequency oscillation (when SYSCR2<XTEN> = “1”). For selecting an interrupt genera-
Note 2: The timer automatically stops, and this register is initialized (the timer's binary counter is also initialized) if one of the fol-
Note 3: If a read instruction for RTCCR is executed, undefined value is set to bits 7 to 3.
Note 4: If break processing is performed on the debugger for the development tool during the timer operation, the timer stops
(32.768 kHz)
tion period, program the RTCSEL when the timer is inactive (RTCRUN = “0”). During the timer operation, do not change
the RTCSEL programming at the same moment the timer stops.
lowing operations is performed while the timer is active:
Therefore, before activating the timer after releasing from STOP or SLEEP0 mode, reprogram the registers again.
counting (contents of the RTCCR isn't altered). When the break is cancelled, processing is restarted from the point at
which it was suspended.
RTCRUN
RTCSEL
1. Stopping the low-frequency oscillation (with SYSCR2<XTEN> = “0”)
2. When the TMP86CH12MG are put in STOP or SLEEP0 mode
7
fs
6
Interrupt generation period
(fs = 32.768 kHz)
RTC control
RTCCR
5
Figure 8-1 Configuration of the RTC
RTCRUN
4
RTCSEL
3
00: 0.50 [s]
01: 0.25 [s]
10: 0.125 [s]
11: 0.0625 [s]
0: Stops and clears the binary counter.
1: Starts counting
Binary counter
Page 69
2
2
11
RTCSEL
/fs
Selector
2
12
/fs
1
2
13
/fs
RTCRUN
2
14
0
/fs
(Initial value: **** *000)
Interrupt request
INTRTC
TMP86CH12MG
R/W
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