SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 72
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 72 of 290
- Download datasheet (5Mb)
Device Reset
3.1
3-2
About device reset
This section describes the ARM9E-S reset signals and how you must use them for
correct operation of the device.
The ARM9E-S has two reset inputs:
nRESET
DBGnTRST The DBGnTRST signal is the debug logic reset that you can use to reset
Both nRESET and DBGnTRST are active LOW signals that asynchronously reset
logic in the ARM9E-S. You must take care when designing the logic to drive these reset
signals.
Copyright © 2000 ARM Limited. All rights reserved.
The nRESET signal is the main CPU reset that initializes the majority of
the ARM9E-S logic.
the ARM9E-S TAP controller and the EmbeddedICE-RT unit.
ARM DDI 0165B
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